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8位单片机PIC汇编语言

Instruction Set

TABLE 1-1: OPCODE FIELD DESCRIPTIONS

Field Description
f Register file address (0x00 to 0x7F)
W Working register (accumulator)
d Destination select;
b Bit address within an 8-bit file register
k Literal field, constant data or label
d value where the results are placed
d = 0 W(orking) register
d = 1 file register; Default is d = 1.

TABLE 1-2: ABBREVIATION DESCRIPTIONS

|Field| Description| | PC | Program Counter| | TO | Time-Out bit| | C | Carry bit| | DC | Digit Carry bit| | Z | Zero bit| | PD | Power-Down bit|

  • Byte-Oriented File Register Operations

    Instruction Description Affected Flags Instruction Cycles
    CLRF f f=0
    Clears the content of File Register f.
    		 Z 1
    CLRW W=0
    Clears W.
    		 Z 1
    SWAPF f, d Swaps the nibbles of f and write the result to destination d. None 1
    ADDWFC f, d Add WREG and Carry bit to f. 1 C, DC, Z 2
    ASRF f, d Arithmetic Right Shift. 1 C, Z 2
    LSLF f, d Logical Left Shift. 1 C, Z 2
    LSRF f, d Logical Right Shift. 1 C, Z 2
    SUBWFB f, d Subtract WREG from f with Borrow. 1 C, DC, Z 2

  • Bit-Oriented File Register Operations

    Instruction Description Affected Flags Instruction Cycles
    BCF f, b Clears (equates to 0) the bit b of register f. None 1
    BSF f, b Sets (equates to 1) the bit b of register f. None 1
    BTFSC f, b Checks if bit b of register f is equal to 0 or not. If it is NOT zero continue with the next line of code, otherwise skips next line. None 1 (if 1)
    2 (if 0)
    BTFSS f, b Checks if bit b of register f is equal to 1 or not. If it is ZERO continue with the next line of code, otherwise skips next line. None 1 (if 0)
    2 (if 1)

  • Literal Operations

    Instruction Description Affected Flags Instruction Cycles
    MOVLB k Move literal to BSR. 1 None 1
    MOVLP k Move literal to PCLATH. 1 None 1

  • Control Operations

    Instruction Description Affected Flags Instruction Cycles
    BRA k Relative Branch. 1 None 2
    BRW — Relative Branch with WREG. 1 None 2
    CALL LABEL Calls subroutine LABEL. None 2
    CALLW — Call Subroutine with WREG. 1 None 2
    GOTO LABEL Jumps to the code under LABEL. None 2
    RETFIE Return command for interrupt subroutines. None 2
    RETLW k Return from a subroutine with W=N. None 2
    RETURN Return from a subroutine. None 2

  • Inherent Operations

    Instruction Description Affected Flags Instruction Cycles
    CLRWDT Clears Watchdog Timer. TO, PD 1
    NOP No Operation
    Does Nothing.
    		 None 1
    RESET — Software device Reset. 1 None 1
    SLEEP Go into Standby Mode. TO, PD 1
    TRIS f Load TRIS register with WREG. 1 None 1

*1: New MCU (PIC16F188/152 etc.) series add 12（47 in total） assembly instructions.

sing data memory and moving data

Instruction Description Affected Flags Instruction Cycles
MOVF f, d f⇒W (if d=0), f⇒f (if d=1)
Moves the content of f to destination d.
 Z 1
MOVWF f W⇒f
Moves W to file register f.
 None 1
MOVLW k k⇒W
Copies the number k to W.
 None 1

MOVF

In general, f is assigned to W.

MOVF    f, 0

The following are special cases:

  • Test
MOVF    f, 1

does not affect the content of f or W.
MOVF with a destination 1 (F), is generally used to check whether the content of the file register is zero or not.

Equivalent Operation(s):

TSTF    f          ;Test File
  • Zero
movf    buffer,F   ;Force Z bit

强制置零

Math

  • Skip if Zero
Instruction Description Affected Flags Instruction Cycles
INCFSZ f, d f+1⇒W (if d=0), f+1⇒f (if d=1)
Increments f and write the result to destination d. The next instruction is skipped if the result is 0 (f=255).
 None 1 (f≠255)
2 (f=255)
DECFSZ f, d f-1⇒W (if d=0), f-1⇒f (if d=1)
Decrements f and write the result to destination d. The next instruction is skipped if the result is 0.
 None 1 (f≠1)
2 (f=1)
  • Add & Subtracts
Instruction Description Affected Flags Instruction Cycles
ADDWF f, d f+W⇒W (if d=0), f+W⇒f (if d=1)
Add W with the content of file register f and write the result to destination d.
 Z, DC, C 1
ADDLW k k+W⇒W
Add literal k and W.
 Z, DC, C 1
INCF f, d f+1⇒W (if d=0), f+1⇒f (if d=1)
Increments f and write the result to destination d.
 Z 1
SUBWF f, d f-W⇒W (if d=0), f-W⇒f (if d=1)
Subtracts W from f and write the result to destination d.
 C, DC, Z 1
SUBLW k k-W⇒W
Subtract W from literal k and write the result to W.
 Z, DC, C 1
DECF f, d f-1⇒W (if d=0), f-1⇒f (if d=1)
Decrements f and write the result to destination d.
 Z 1

SUBWF

d=0 d=1

AFFECTED FLAGS

SUBWF affects the flags Z, DC and C.
Note: The destination D (=0, W, 1 or F) is not effective on the flags.

  • Z
    Zero Flag (Z) is set if the result of the subtraction is equal to zero.
    In the example below, because the result is 48 (different from 0) Z=0 at the end of SUBWF instruction.

Example:
Let’s say W=15 and COUNTER=63, then

SUBWF COUNTER, F

makes COUNTER=48. W remains the same. If the destination was W (or 0), W becomes 48 and COUNTER remains the same.

logic operation

Instruction Description Affected Flags Instruction Cycles
ANDWF f, d f&W⇒W (if d=0), f&W⇒f (if d=1)
Logically AND W with the content of file register f and write the result to destination d.
 Z 1
ANDLW k k&W⇒W
Logically ANDs literal k with W.
 Z 1
IORWF f, d f | W⇒W (if d=0), f | W⇒f (if d=1)
Logically ORs f with W and write the result to destination d.
 Z 1
IORLW k k | W⇒W
Logically ORs literal k with W.
 Z 1
XORWF f, d f^W⇒W (if d=0), f^W⇒f (if d=1)
Logically XORs f with W and write the result to destination d.
 Z 1
XORLW k k^W⇒W
Logically XORs literal k with W.
 Z 1

Code bit manipulation

Instruction Description Affected Flags Instruction Cycles
COMF f, d f⇒W (if d=0), f⇒f (if d=1)
Takes the complement of each bit in f and write the result to destination d.
 Z 1
RLF f, d f<1⇒W (if d=0), f<1⇒f (if d=1)
Rotates f one bit to the left through Carry Bit and write the result to destination d.
 C 1
RRF f, d f>1⇒W (if d=0), f>1⇒f (if d=1)
Rotates f one bit to the right through Carry Bit and write the result to destination d.
 C 1

Ref

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